#include <core/system.h>
#include <dev/dev.h>
#include <cpu/io.h>
#include <dev/irq.h>

Data Structures
struct	pci_dev
	A PCI function: its bus, device (slot) and function numbers. More...
struct	pci_host
	The host bridge, which the platform describes (platform_init() sets it): how its configuration space is reached, which IRQs its devices' interrupt pins are routed to, and where their registers go if no firmware placed them. More...
struct	pci_bar
	A base address register (BAR): where the device's registers are, how big they are, and whether they are ports or memory. More...

Macros
#define	PCI_CAP_MSI 0x05
#define	PCI_CAP_MSIX 0x11

Functions
int	pci_host_set (struct pci_host *host)
	Sets the platform's host bridge, from platform_init().
uint32_t	pci_conf1_read (struct pci_host host, struct pci_dev dev, uint16_t reg)
	Reads a 32-bit register of a function's configuration space.
void	pci_conf1_write (struct pci_host host, struct pci_dev dev, uint16_t reg, uint32_t val)
	Writes a 32-bit register of a function's configuration space.
uint32_t	pci_ecam_read (struct pci_host host, struct pci_dev dev, uint16_t reg)
	Reads a 32-bit register of a function's configuration space.
void	pci_ecam_write (struct pci_host host, struct pci_dev dev, uint16_t reg, uint32_t val)
	Writes a 32-bit register of a function's configuration space.
int	pci_scan_device (uint8_t class, uint8_t subclass, struct pci_dev *_dev, size_t nr)
	Finds the functions of a class and subclass, on bus 0.
int	pci_device_scan (uint16_t vendor_id, uint16_t device_id, struct pci_dev *ref)
	Finds a device by its vendor and device IDs, on bus 0.
uint8_t	pci_reg8_read (struct pci_dev *dev, uint8_t off)
	Reads an 8-bit configuration register.
uint16_t	pci_reg16_read (struct pci_dev *dev, uint8_t off)
	Reads a 16-bit configuration register.
uint32_t	pci_reg32_read (struct pci_dev *dev, uint8_t off)
	Reads a 32-bit configuration register.
void	pci_reg8_write (struct pci_dev *dev, uint8_t off, uint8_t val)
	Writes an 8-bit configuration register: the 32-bit register it's in is read, changed and written back.
void	pci_reg16_write (struct pci_dev *dev, uint8_t off, uint16_t val)
	Writes a 16-bit configuration register: the 32-bit register it's in is read, changed and written back.
void	pci_reg32_write (struct pci_dev *dev, uint8_t off, uint32_t val)
	Writes a 32-bit configuration register.
uint32_t	pci_read_bar (struct pci_dev *dev, uint8_t id)
	Reads a base address register as it is, flag bits included.
int	pci_bar (struct pci_dev dev, int id, struct pci_bar bar)
	Reads a base address register: what it decodes (memory or ports), its address, and its size.
void	pci_enable (struct pci_dev *dev)
	Turns a function's memory and port decoding on, and bus mastering, so that it can do DMA.
int	pci_irq (struct pci_dev *dev)
	Finds the IRQ that a function's interrupt pin comes to.
uint8_t	pci_cap_find (struct pci_dev *dev, uint8_t id)
	Finds one of a function's capabilities.
int	pci_msi_enable (struct pci_dev dev, irq_handler_t handler, void arg)
	Has a function send its interrupts as messages (MSI) instead of on its interrupt line: one message, for an IRQ that goes to handler.

Variables
struct dev	pcidev

Macro Definition Documentation

◆ PCI_CAP_MSI

#define PCI_CAP_MSI 0x05

Definition at line 94 of file pci.h.

Referenced by pci_msi_enable().

◆ PCI_CAP_MSIX

#define PCI_CAP_MSIX 0x11

Definition at line 95 of file pci.h.

Function Documentation

◆ pci_bar()

int pci_bar	(	struct pci_dev *	dev,
		int	id,
		struct pci_bar *	bar )

Reads a base address register: what it decodes (memory or ports), its address, and its size.

The size is found by writing all ones to the register and reading back what the device kept, with decoding turned off meanwhile. A 64-bit memory BAR uses the next register too.

Parameters

dev	the function
id	the BAR's number, 0 to 5
bar	set to what the BAR decodes

Returns: 0, or -1 if the BAR decodes nothing

Definition at line 307 of file pci.c.

References pci_bar::addr, pci_bar::io, PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MEMORY, pci_reg16_read(), pci_reg16_write(), pci_reg32_read(), pci_reg32_write(), and pci_bar::size.

◆ pci_cap_find()

uint8_t pci_cap_find	(	struct pci_dev *	dev,
		uint8_t	id )

Finds one of a function's capabilities.

Parameters

dev	the function
id	the capability (PCI_CAP_*)

Returns: the capability's offset in the configuration space, or 0 if the function doesn't have it

Definition at line 478 of file pci.c.

References pci_cap_find(), PCI_CAPABILITIES, pci_reg16_read(), pci_reg8_read(), PCI_STATUS, and PCI_STATUS_CAP_LIST.

Referenced by pci_cap_find(), and pci_msi_enable().

◆ pci_conf1_read()

uint32_t pci_conf1_read	(	struct pci_host *	host,
		struct pci_dev *	dev,
		uint16_t	reg )

Reads a 32-bit register of a function's configuration space.

Parameters

host	the host bridge
dev	the function
reg	the register's offset (rounded down to 4 bytes)

Returns: the register's value, or all ones for an offset past 255

Definition at line 55 of file conf1.c.

References conf1_select(), pci_host::config, io_in32(), pci_conf1_read(), and PCI_CONFIG_DATA.

Referenced by pci_conf1_read().

◆ pci_conf1_write()

void pci_conf1_write	(	struct pci_host *	host,
		struct pci_dev *	dev,
		uint16_t	reg,
		uint32_t	val )

Writes a 32-bit register of a function's configuration space.

An offset past 255 is left alone.

Parameters

host	the host bridge
dev	the function
reg	the register's offset (rounded down to 4 bytes)
val	the value to write

Definition at line 73 of file conf1.c.

References conf1_select(), pci_host::config, io_out32(), pci_conf1_write(), and PCI_CONFIG_DATA.

Referenced by pci_conf1_write().

◆ pci_device_scan()

int pci_device_scan	(	uint16_t	vendor_id,
		uint16_t	device_id,
		struct pci_dev *	ref )

Finds a device by its vendor and device IDs, on bus 0.

Parameters

vendor_id	the vendor ID
device_id	the device ID
ref	if not NULL, set to the first function found

Returns: 0 if one was found, -1 if not

Definition at line 87 of file pci.c.

References pci_dev::bus, pci_dev::dev, pci_dev::func, get_device_id(), get_vendor_id(), and pci_device_scan().

Referenced by e1000_probe(), and pci_device_scan().

◆ pci_ecam_read()

uint32_t pci_ecam_read	(	struct pci_host *	host,
		struct pci_dev *	dev,
		uint16_t	reg )

Reads a 32-bit register of a function's configuration space.

Parameters

host	the host bridge
dev	the function
reg	the register's offset (rounded down to 4 bytes)

Returns: the register's value, or all ones if it is past what the host mapped

Definition at line 32 of file ecam.c.

References pci_host::config, io_in32(), offset(), pci_ecam_read(), and pci_host::size.

Referenced by pci_ecam_read().

◆ pci_ecam_write()

void pci_ecam_write	(	struct pci_host *	host,
		struct pci_dev *	dev,
		uint16_t	reg,
		uint32_t	val )

Writes a 32-bit register of a function's configuration space.

A register past what the host mapped is left alone.

Parameters

host	the host bridge
dev	the function
reg	the register's offset (rounded down to 4 bytes)
val	the value to write

Definition at line 51 of file ecam.c.

References pci_host::config, io_out32(), offset(), and pci_ecam_write().

Referenced by pci_ecam_write().

◆ pci_enable()

void pci_enable ( struct pci_dev * dev )

Turns a function's memory and port decoding on, and bus mastering, so that it can do DMA.

Parameters

dev	the function

Definition at line 349 of file pci.c.

References PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, pci_enable(), pci_reg16_read(), and pci_reg16_write().

Referenced by e1000_probe(), and pci_enable().

◆ pci_host_set()

int pci_host_set ( struct pci_host * h )

Sets the platform's host bridge, from platform_init().

Its configuration space is mapped if it is memory (ECAM), and the BARs no firmware assigned get addresses in its windows.

Parameters

h	the host bridge

Returns: 0, or -ENOMEM if its configuration space couldn't be mapped

Definition at line 443 of file pci.c.

References ioaddr::addr, arch_mmio_map(), pci_host::config, host, pci_host::io_size, IOADDR_PORT, pci_host::mem_size, pci_host::name, pci_assign(), pci_host_set(), printk(), pci_host::size, and ioaddr::type.

Referenced by pci_host_set(), platform_init(), and x86_pc_pci_init().

◆ pci_irq()

int pci_irq ( struct pci_dev * dev )

Finds the IRQ that a function's interrupt pin comes to.

If the host bridge says which IRQs INTA# to INTD# come to, the pin is swizzled by the device's slot, as a bridge's interrupt map does (INTA# of slot 1 is INTB#). Otherwise it is the interrupt line that the firmware wrote.

Parameters

dev	the function

Returns: the IRQ, or -1 if the function has no interrupt pin

Definition at line 367 of file pci.c.

References host, pci_host::irq, pci_host::nirq, PCI_INTERRUPT_LINE, PCI_INTERRUPT_PIN, pci_irq(), and pci_reg8_read().

Referenced by ata_probe(), e1000_probe(), and pci_irq().

◆ pci_msi_enable()

int pci_msi_enable	(	struct pci_dev *	dev,
		irq_handler_t	handler,
		void *	arg )

Has a function send its interrupts as messages (MSI) instead of on its interrupt line: one message, for an IRQ that goes to handler.

Its interrupt line (INTx) is turned off. If MSI isn't possible, the caller uses the line instead.

Parameters

dev	the function
handler	the interrupt's handler
arg	the handler's argument

Returns: the IRQ, -ENODEV if the function or the architecture has no MSI, or another negative errno

Definition at line 517 of file pci.c.

References pci_bar::addr, arch_msi_alloc(), MSI_ADDR, MSI_CTRL, MSI_CTRL_64BIT, MSI_CTRL_ENABLE, MSI_CTRL_MME, pci_cap_find(), PCI_CAP_MSI, PCI_COMMAND, PCI_COMMAND_INTX_OFF, pci_msi_enable(), pci_reg16_read(), pci_reg16_write(), and pci_reg32_write().

Referenced by e1000_probe(), and pci_msi_enable().

◆ pci_read_bar()

uint32_t pci_read_bar	(	struct pci_dev *	dev,
		uint8_t	id )

Reads a base address register as it is, flag bits included.

Parameters

dev	the function
id	the BAR's number, 0 to 5

Returns: the register's value

Definition at line 285 of file pci.c.

References pci_read_bar(), and pci_read_dword().

Referenced by ata_probe(), and pci_read_bar().

◆ pci_reg16_read()

uint16_t pci_reg16_read	(	struct pci_dev *	dev,
		uint8_t	off )

Reads a 16-bit configuration register.

Parameters

dev	the function
off	the register's offset, a multiple of 2

Returns: its value

Definition at line 130 of file pci.c.

References pci_read_dword(), and pci_reg16_read().

Referenced by ata_probe(), pci_bar(), pci_cap_find(), pci_enable(), pci_msi_enable(), and pci_reg16_read().

◆ pci_reg16_write()

void pci_reg16_write	(	struct pci_dev *	dev,
		uint8_t	off,
		uint16_t	val )

Writes a 16-bit configuration register: the 32-bit register it's in is read, changed and written back.

Parameters

dev	the function
off	the register's offset, a multiple of 2
val	the value to write

Definition at line 170 of file pci.c.

References pci_read_dword(), pci_reg16_write(), and pci_write_dword().

Referenced by ata_probe(), pci_bar(), pci_enable(), pci_msi_enable(), and pci_reg16_write().

◆ pci_reg32_read()

uint32_t pci_reg32_read	(	struct pci_dev *	dev,
		uint8_t	off )

Reads a 32-bit configuration register.

Parameters

dev	the function
off	the register's offset, a multiple of 4

Returns: its value

Definition at line 142 of file pci.c.

References pci_read_dword(), and pci_reg32_read().

Referenced by pci_assign(), pci_bar(), and pci_reg32_read().

◆ pci_reg32_write()

void pci_reg32_write	(	struct pci_dev *	dev,
		uint8_t	off,
		uint32_t	val )

Writes a 32-bit configuration register.

Parameters

dev	the function
off	the register's offset, a multiple of 4
val	the value to write

Definition at line 184 of file pci.c.

References pci_reg32_write(), and pci_write_dword().

Referenced by pci_assign(), pci_bar(), pci_msi_enable(), and pci_reg32_write().

◆ pci_reg8_read()

uint8_t pci_reg8_read	(	struct pci_dev *	dev,
		uint8_t	off )

Reads an 8-bit configuration register.

Parameters

dev	the function
off	the register's offset

Returns: its value

Definition at line 118 of file pci.c.

References pci_read_dword(), and pci_reg8_read().

Referenced by pci_cap_find(), pci_irq(), and pci_reg8_read().

◆ pci_reg8_write()

void pci_reg8_write	(	struct pci_dev *	dev,
		uint8_t	off,
		uint8_t	val )

Writes an 8-bit configuration register: the 32-bit register it's in is read, changed and written back.

Parameters

dev	the function
off	the register's offset
val	the value to write

Definition at line 155 of file pci.c.

References pci_read_dword(), pci_reg8_write(), and pci_write_dword().

Referenced by pci_reg8_write().

◆ pci_scan_device()

int pci_scan_device	(	uint8_t	class,
		uint8_t	subclass,
		struct pci_dev *	_dev,
		size_t	nr )

Finds the functions of a class and subclass, on bus 0.

Parameters

class	the class code
subclass	the subclass code
_dev	set to the functions found
nr	how many _dev can hold

Returns: how many were found, at most nr

Definition at line 244 of file pci.c.

References pci_dev::bus, pci_dev::dev, pci_dev::func, get_class_code(), get_subclass_code(), get_vendor_id(), and pci_scan_device().

Referenced by ata_probe(), and pci_scan_device().

Variable Documentation

◆ pcidev

struct dev pcidev

extern

Definition at line 225 of file pci.c.

Data Structures

Macros

Functions

Variables

Macro Definition Documentation

◆ PCI_CAP_MSI

◆ PCI_CAP_MSIX

Function Documentation

◆ pci_bar()

◆ pci_cap_find()

◆ pci_conf1_read()

◆ pci_conf1_write()

◆ pci_device_scan()

◆ pci_ecam_read()

◆ pci_ecam_write()

◆ pci_enable()

◆ pci_host_set()

◆ pci_irq()

◆ pci_msi_enable()

◆ pci_read_bar()

◆ pci_reg16_read()

◆ pci_reg16_write()

◆ pci_reg32_read()

◆ pci_reg32_write()

◆ pci_reg8_read()

◆ pci_reg8_write()

◆ pci_scan_device()

Variable Documentation

◆ pcidev