AquilaOS documentation
How it works, and its code
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init.c
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1
5
6#include <core/system.h>
7#include <dev/pci.h>
8#include <platform/virt.h>
9
10/* The PCIe host bridge (pci-host-ecam-generic), with bus 0's
11 * configuration space. No firmware runs before the kernel (QEMU's
12 * -kernel), so the kernel assigns the BARs itself: in the memory window,
13 * and ports from 0x1000 (not 0, which means unassigned). */
14static struct pci_host virt_pci = {
15 .name = "ecam",
16 .config = {.type = IOADDR_MMIO8, .addr = VIRT_PCIE_ECAM},
17 .size = 1 << 20,
18 .read = pci_ecam_read,
19 .write = pci_ecam_write,
20 .nirq = 4,
22 .mem_base = VIRT_PCIE_MMIO,
23 .mem_size = VIRT_PCIE_MMIO_SIZE,
24 .io_base = 0x1000,
25 .io_size = 0x10000 - 0x1000,
26};
27
28/*
29 * Sets up the platform at boot: the GIC, and the PCI host bridge.
30 */
32{
33 gic_setup();
34 printk("virt: GICv2, interrupts through it\n");
35
36#ifdef CONFIG_DEV_PCI
38#endif
39
40 return 0;
41}
static struct pci_host virt_pci
Definition init.c:14
#define IOADDR_MMIO8
Definition io.h:90
void pci_ecam_write(struct pci_host *host, struct pci_dev *dev, uint16_t reg, uint32_t val)
Writes a 32-bit register of a function's configuration space.
Definition ecam.c:51
uint32_t pci_ecam_read(struct pci_host *host, struct pci_dev *dev, uint16_t reg)
Reads a 32-bit register of a function's configuration space.
Definition ecam.c:32
void gic_setup(void)
Sets up the GIC at boot: every interrupt masked, of the same priority, and sent to CPU 0.
Definition gic.c:38
int pci_host_set(struct pci_host *h)
Sets the platform's host bridge, from platform_init().
Definition pci.c:443
int printk(const char *fmt,...)
Writes a kernel message, to the message buffer and the consoles.
Definition printk.c:249
The host bridge, which the platform describes (platform_init() sets it): how its configuration space ...
Definition pci.h:32
#define VIRT_PCIE_ECAM
Definition virt.h:20
int platform_init(void)
Definition init.c:31
#define VIRT_PCIE_IRQ
Definition virt.h:25
#define VIRT_PCIE_MMIO_SIZE
Definition virt.h:18
#define VIRT_PCIE_MMIO
Definition virt.h:17