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AquilaOS documentation
How it works, and its code
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Go to the source code of this file.
Macros | |
| #define | VIRT_GICD 0x08000000 |
| #define | VIRT_GICC 0x08010000 |
| #define | VIRT_UART 0x09000000 |
| #define | VIRT_RTC 0x09010000 |
| #define | VIRT_PCIE_MMIO 0x10000000 |
| #define | VIRT_PCIE_MMIO_SIZE 0x2EFF0000 |
| #define | VIRT_PCIE_PIO 0x3EFF0000 |
| #define | VIRT_PCIE_ECAM 0x4010000000ULL |
| #define | VIRT_UART_IRQ (32 + 1) |
| #define | VIRT_PCIE_IRQ (32 + 3) |
| #define | VIRT_TIMER_IRQ 27 |
| #define | VIRT_REG(base) |
| #define | IRQ_NR 128 |
Functions | |
| int | platform_init (void) |
| void | gic_setup (void) |
| Sets up the GIC at boot: every interrupt masked, of the same priority, and sent to CPU 0. | |
| void | gic_enable (unsigned irq) |
| Enables (unmasks) an interrupt. | |
| void | gic_disable (unsigned irq) |
| Disables (masks) an interrupt. | |
| unsigned | gic_ack (void) |
| Acknowledges the interrupt that came. | |
| void | gic_eoi (unsigned irq) |
| Tells the GIC that an interrupt has been handled (end of interrupt). | |
| void | irq_handle (void) |
| Runs the handlers of the interrupt that came, then tells the GIC it's done, before any thread switch, so that the next interrupts keep coming. | |
| uint64_t | timer_setup (uint64_t period_ns, void(*handler)(void)) |
| Starts the tick. | |
| #define IRQ_NR 128 |
Definition at line 43 of file virt.h.
Referenced by arch_interrupts_info(), gic_setup(), irq_handle(), irq_install(), and irq_uninstall().
| #define VIRT_REG | ( | base | ) |
Definition at line 30 of file virt.h.
Referenced by arch_time_get().
| #define VIRT_RTC 0x09010000 |
Definition at line 16 of file virt.h.
Referenced by arch_time_get().
| #define VIRT_TIMER_IRQ 27 |
Definition at line 26 of file virt.h.
Referenced by timer_setup().
| unsigned gic_ack | ( | void | ) |
| void gic_disable | ( | unsigned | irq | ) |
Disables (masks) an interrupt.
| irq | its interrupt ID |
Definition at line 75 of file gic.c.
References gic_disable(), gicd, and GICD_ICENABLER.
Referenced by gic_disable(), and irq_uninstall().
| void gic_enable | ( | unsigned | irq | ) |
Enables (unmasks) an interrupt.
| irq | its interrupt ID |
Definition at line 65 of file gic.c.
References gic_enable(), gicd, and GICD_ISENABLER.
Referenced by gic_enable(), and irq_install().
| void gic_eoi | ( | unsigned | irq | ) |
| void gic_setup | ( | void | ) |
Sets up the GIC at boot: every interrupt masked, of the same priority, and sent to CPU 0.
Definition at line 38 of file gic.c.
References gic_setup(), gicc, GICC_CTLR, GICC_PMR, gicd, GICD_CTLR, GICD_ICENABLER, GICD_IPRIORITYR, GICD_ITARGETSR, and IRQ_NR.
Referenced by gic_setup(), and platform_init().
| void irq_handle | ( | void | ) |
Runs the handlers of the interrupt that came, then tells the GIC it's done, before any thread switch, so that the next interrupts keep coming.
Definition at line 84 of file irq.c.
References counts, gic_ack(), gic_eoi(), handlers, irq_handle(), IRQ_NR, and handler::next.
Referenced by __x86_irq_handler(), aarch64_irq(), irq_dispatch(), irq_handle(), and irq_handle().
| int platform_init | ( | void | ) |
Definition at line 31 of file init.c.
References apic, gic_setup(), pci_host_set(), platform_init(), printk(), virt_pci, x86_pc_cmos_init(), x86_pc_irq_init(), x86_pc_pci_init(), x86_pc_pit_init(), and x86_smp_init().
Referenced by aarch64_init(), platform_init(), and x86_cpu_init().
Starts the tick.
| period_ns | how often it comes, in ns |
| handler | what it calls |
Definition at line 37 of file timer.c.
References freq, interval, irq_install(), isb, NULL, printk(), read_sysreg, tick, timer_irq(), timer_setup(), VIRT_TIMER_IRQ, and write_sysreg.
Referenced by arch_sched_init(), and timer_setup().