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AquilaOS documentation
How it works, and its code
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Go to the source code of this file.
Data Structures | |
| struct | x86_irq_chip |
| An interrupt controller: the 8259s, or the APIC. More... | |
Macros | |
| #define | X86_IRQ_NR 49 |
| #define | X86_IRQ_TIMER 48 |
| #define | X86_TIMER_VECTOR 0xF0 |
| #define | X86_TLB_VECTOR 0xF1 |
| #define | X86_WAKE_VECTOR 0xF2 |
| #define | X86_SPURIOUS_VECTOR 0xFF |
Functions | |
| void | x86_irq_chip_set (struct x86_irq_chip *chip) |
| Sets the system's interrupt controller. | |
| const char * | x86_irq_chip_name (void) |
| Returns the name of the system's interrupt controller. | |
| void | x86_irq_gates_setup (void) |
| Sets the IDT's gates for the interrupts: vectors 32 to 79, the local APIC's timer, the TLB and wake IPIs, and its spurious interrupt. | |
| void | x86_irq_tick_switch (void) |
| Asks for a thread switch once the current interrupt is done: the tick calls it. | |
| void | x86_irq_alloc_from (unsigned first) |
| Sets the first IRQ that x86_irq_alloc() may give: past the I/O APICs' last pin. | |
| int | x86_irq_alloc (struct x86_irq_chip *chip) |
| Gives a free IRQ with a controller of its own, for an MSI. | |
| int | x86_pic_setup (struct ioaddr *master, struct ioaddr *slave) |
| Sets up the 8259s, with every IRQ masked. | |
| void | x86_pic_disable (void) |
| Masks every IRQ of the 8259s, when the APIC brings the interrupts. | |
| int | x86_apic_setup (void) |
| Sets up the APIC to bring the interrupts, if the CPU has one, the MADT describes it, and the kernel's command line doesn't say apic=off. | |
| uint32_t | x86_lapic_timer_setup (uint32_t period_ns, irq_handler_t handler) |
| Starts the scheduler's tick with the local APIC's timer, calibrated first. | |
| void | x86_lapic_cpu_setup (void) |
| Sets up the running CPU's local APIC: enabled, with the spurious vector 0xFF, its timer off, the NMI on the LINT input the MADT says, and the other LINT (the 8259s') masked. | |
| int | x86_apic_cpus (uint32_t *ids, int max) |
| Lists the CPUs' local APIC IDs, the boot CPU's among them. | |
| void | x86_lapic_ipi (uint32_t id, uint32_t icr) |
| Sends an IPI to a CPU, and waits until it is delivered. | |
| void | x86_lapic_eoi (void) |
| Tells the running CPU's local APIC that its interrupt (an IPI) is handled. | |
| void | x86_lapic_timer_cpu_start (void) |
| Starts the running CPU's local APIC timer, with the boot CPU's calibration, once it has been done. | |
| void | x86_smp_init (void) |
| Starts the other CPUs, at boot, unless the kernel's command line says smp=off. | |
| int | x86_clock_precise (void) |
| Says whether the clock counts finer than the ticks. | |
| void | x86_acpi_poweroff (void) |
| Powers the machine off, by entering ACPI's S5 sleep state. | |
| void * | x86_acpi_table (const char *signature) |
| Finds one of ACPI's tables, by its signature. | |
| int | x86_hpet_init (void) |
| Finds the HPET and starts its counter. | |
| uint64_t | x86_hpet_read (void) |
| Reads the HPET's 64-bit counter. | |
| uint32_t | x86_hpet_read32 (void) |
| Reads the low half of the HPET's counter only: a single read, which matters because each read is slow under a hypervisor. | |
| uint64_t | x86_hpet_period_fs (void) |
| Returns the HPET counter's period. | |
| int | x86_pit_setup (struct ioaddr *io) |
| Sets where the PIT's ports are. | |
| uint32_t | x86_pit_period_set (uint32_t period_ns) |
| Makes channel 0 interrupt periodically, for the scheduler's tick. | |
| void | x86_pit_delay (uint32_t us) |
| Waits us microseconds, at most 54 ms, busy. | |
| int | x86_cmos_setup (struct ioaddr *ioaddr) |
| Sets where the CMOS's ports are. | |
Variables | |
| struct x86_irq_chip | x86_pic_chip |
| #define X86_IRQ_NR 49 |
Definition at line 12 of file misc.h.
Referenced by arch_interrupts_info(), irq_handle(), irq_install(), and irq_uninstall().
| #define X86_IRQ_TIMER 48 |
Definition at line 13 of file misc.h.
Referenced by apic_mask(), apic_unmask(), arch_interrupts_info(), irq_handle(), irq_install(), irq_uninstall(), x86_irq_alloc(), and x86_lapic_timer_setup().
| #define X86_SPURIOUS_VECTOR 0xFF |
Definition at line 17 of file misc.h.
Referenced by x86_irq_gates_setup(), and x86_lapic_cpu_setup().
| #define X86_TIMER_VECTOR 0xF0 |
Definition at line 14 of file misc.h.
Referenced by irq_handle(), x86_irq_gates_setup(), and x86_lapic_timer_cpu_start().
| #define X86_TLB_VECTOR 0xF1 |
Definition at line 15 of file misc.h.
Referenced by __x86_irq_handler(), tlb_shootdown(), and x86_irq_gates_setup().
| #define X86_WAKE_VECTOR 0xF2 |
Definition at line 16 of file misc.h.
Referenced by __x86_irq_handler(), arch_cpu_kick(), and x86_irq_gates_setup().
| void x86_acpi_poweroff | ( | void | ) |
Powers the machine off, by entering ACPI's S5 sleep state.
It returns only if it couldn't.
Definition at line 265 of file acpi.c.
References acpi_s5(), acpi_table(), FADT_ACPI_ENABLE, FADT_DSDT, FADT_PM1A_CNT, FADT_PM1B_CNT, FADT_SMI_CMD, io_out8(), IOADDR_PORT, pm1_read(), PM1_SCI_EN, PM1_SLP_EN, pm1_write(), printk(), x86_acpi_poweroff(), and x86_acpi_table().
Referenced by arch_poweroff(), and x86_acpi_poweroff().
| void * x86_acpi_table | ( | const char * | signature | ) |
Finds one of ACPI's tables, by its signature.
The tables are mapped the first time.
| signature | the table's signature, 4 characters ("APIC", "HPET") |
Definition at line 183 of file acpi.c.
References acpi_tables(), memcmp(), NULL, acpi_sdt_header::signature, tables, tables_nr, and x86_acpi_table().
Referenced by x86_acpi_poweroff(), x86_acpi_table(), x86_apic_setup(), and x86_hpet_init().
| int x86_apic_cpus | ( | uint32_t * | ids, |
| int | max ) |
Lists the CPUs' local APIC IDs, the boot CPU's among them.
| ids | where to put them |
| max | how many fit |
Definition at line 322 of file apic.c.
References cpu_ids, cpu_ids_nr, lapic, MIN, and x86_apic_cpus().
Referenced by x86_apic_cpus(), and x86_smp_init().
| int x86_apic_setup | ( | void | ) |
Sets up the APIC to bring the interrupts, if the CPU has one, the MADT describes it, and the kernel's command line doesn't say apic=off.
Definition at line 359 of file apic.c.
References ACPI_MADT_ENABLED, ACPI_MADT_INT_SRC_OVERRIDE, ACPI_MADT_IO_APIC, ACPI_MADT_LOCAL_APIC, ACPI_MADT_LOCAL_APIC_NMI, ACPI_MPS_TRIGGER_LEVEL, ACPI_MPS_TRIGGER_MASK, acpi_madt_io_apic::address, ioapic::address, apic_chip, acpi_madt_local_apic::apic_id, arch_cpu::apic_id, cpu::arch, arch_mmio_map(), acpi_madt_override::bus, cpu_has_apic(), cpu_ids, cpu_ids_nr, cpus, CPUS_MAX, acpi_madt_local_apic::flags, acpi_madt_local_apic_nmi::flags, acpi_madt_override::flags, acpi_madt_override::gsi, acpi_madt_io_apic::gsi_base, ioapic::gsi_base, acpi_madt::header, ioapic_read(), IOAPIC_REDIR, IOAPIC_VER, ioapic_write(), ioapics, IOAPICS_MAX, ioapics_nr, isa, kargs_get(), lapic, LAPIC_ID, lapic_id, lapic_read(), acpi_sdt_header::length, acpi_madt_local_apic_nmi::lint, acpi_madt::local_apic_address, nmi_lint, NULL, ioapic::pins, printk(), REDIR_MASKED, ioapic::regs, acpi_madt_override::source, x86_acpi_table(), x86_apic_setup(), x86_irq_alloc_from(), x86_irq_chip_set(), x86_lapic_cpu_setup(), and x86_pic_disable().
Referenced by x86_apic_setup(), and x86_pc_irq_init().
| int x86_clock_precise | ( | void | ) |
Says whether the clock counts finer than the ticks.
Definition at line 193 of file clock.c.
References source, SOURCE_PIT, and x86_clock_precise().
Referenced by timer_calibrate(), and x86_clock_precise().
| int x86_cmos_setup | ( | struct ioaddr * | ioaddr | ) |
Sets where the CMOS's ports are.
| ioaddr | its index and data ports (0x70) |
Definition at line 139 of file cmos.c.
References ioaddr::addr, cmos, ioaddr_type_str(), printk(), and x86_cmos_setup().
Referenced by x86_cmos_setup(), and x86_pc_cmos_init().
| int x86_hpet_init | ( | void | ) |
Finds the HPET and starts its counter.
Definition at line 90 of file hpet.c.
References acpi_gas::address, acpi_hpet::address, arch_mmio_map(), CNF_ENABLE, CNF_LEGACY, acpi_hpet::header, HPET_CAP, HPET_CNF, HPET_CNT, acpi_sdt_header::length, NULL, period_fs, PERIOD_MAX_FS, printk(), reg32(), reg32_write(), regs, acpi_gas::space, x86_acpi_table(), and x86_hpet_init().
Referenced by x86_clock_init(), and x86_hpet_init().
| uint64_t x86_hpet_period_fs | ( | void | ) |
Returns the HPET counter's period.
Definition at line 79 of file hpet.c.
References period_fs, and x86_hpet_period_fs().
Referenced by tsc_calibrate(), x86_clock_init(), and x86_hpet_period_fs().
| uint64_t x86_hpet_read | ( | void | ) |
Reads the HPET's 64-bit counter.
Its two halves are read again until the high half is the same before and after, so that a carry between them can't give a wrong value.
Definition at line 51 of file hpet.c.
References HPET_CNT, reg32(), and x86_hpet_read().
Referenced by tsc_calibrate(), and x86_hpet_read().
| uint32_t x86_hpet_read32 | ( | void | ) |
Reads the low half of the HPET's counter only: a single read, which matters because each read is slow under a hypervisor.
Definition at line 69 of file hpet.c.
References HPET_CNT, reg32(), and x86_hpet_read32().
Referenced by counter(), and x86_hpet_read32().
| int x86_irq_alloc | ( | struct x86_irq_chip * | c | ) |
Gives a free IRQ with a controller of its own, for an MSI.
| c | the IRQ's controller |
Definition at line 99 of file irq.c.
References alloc_first, chip, handlers, irqs, x86_irq_alloc(), and X86_IRQ_TIMER.
Referenced by arch_msi_alloc(), and x86_irq_alloc().
| void x86_irq_alloc_from | ( | unsigned | first | ) |
Sets the first IRQ that x86_irq_alloc() may give: past the I/O APICs' last pin.
| first | the first IRQ |
Definition at line 88 of file irq.c.
References alloc_first, and x86_irq_alloc_from().
Referenced by x86_apic_setup(), and x86_irq_alloc_from().
| const char * x86_irq_chip_name | ( | void | ) |
Returns the name of the system's interrupt controller.
Definition at line 77 of file irq.c.
References chip, x86_irq_chip::name, and x86_irq_chip_name().
Referenced by arch_interrupts_info(), x86_irq_chip_name(), and x86_pc_irq_init().
| void x86_irq_chip_set | ( | struct x86_irq_chip * | c | ) |
Sets the system's interrupt controller.
| c | the controller: the 8259s or the APIC |
Definition at line 67 of file irq.c.
References chip, and x86_irq_chip_set().
Referenced by x86_apic_setup(), x86_irq_chip_set(), and x86_pc_irq_init().
| void x86_irq_gates_setup | ( | void | ) |
Sets the IDT's gates for the interrupts: vectors 32 to 79, the local APIC's timer, the TLB and wake IPIs, and its spurious interrupt.
Definition at line 266 of file irq.c.
References x86_idt_gate_set(), x86_irq_gates_setup(), X86_SPURIOUS_VECTOR, X86_TIMER_VECTOR, X86_TLB_VECTOR, and X86_WAKE_VECTOR.
Referenced by x86_irq_gates_setup(), and x86_pc_irq_init().
| void x86_irq_tick_switch | ( | void | ) |
Asks for a thread switch once the current interrupt is done: the tick calls it.
Definition at line 169 of file irq.c.
References x86_irq_tick_switch().
Referenced by x86_irq_tick_switch(), and x86_sched_handler().
| void x86_lapic_cpu_setup | ( | void | ) |
Sets up the running CPU's local APIC: enabled, with the spurious vector 0xFF, its timer off, the NMI on the LINT input the MADT says, and the other LINT (the 8259s') masked.
Definition at line 303 of file apic.c.
References APIC_BASE, APIC_BASE_ENABLE, LAPIC_LVT_ERROR, LAPIC_LVT_LINT0, LAPIC_LVT_LINT1, LAPIC_LVT_TIMER, LAPIC_SVR, LAPIC_TPR, lapic_write(), LVT_MASKED, LVT_NMI, nmi_lint, SVR_ENABLE, x86_lapic_cpu_setup(), and X86_SPURIOUS_VECTOR.
Referenced by x86_ap_start(), x86_apic_setup(), and x86_lapic_cpu_setup().
| void x86_lapic_eoi | ( | void | ) |
Tells the running CPU's local APIC that its interrupt (an IPI) is handled.
Definition at line 216 of file apic.c.
References LAPIC_EOI, lapic_write(), and x86_lapic_eoi().
Referenced by __x86_irq_handler(), and x86_lapic_eoi().
Sends an IPI to a CPU, and waits until it is delivered.
| id | the CPU's local APIC ID |
| icr | the low half of the interrupt command register: the delivery mode, the vector, and so on |
Definition at line 342 of file apic.c.
References ICR_PENDING, LAPIC_ICR_HI, LAPIC_ICR_LO, lapic_read(), lapic_write(), and x86_lapic_ipi().
Referenced by ap_boot(), arch_cpu_kick(), tlb_shootdown(), and x86_lapic_ipi().
| void x86_lapic_timer_cpu_start | ( | void | ) |
Starts the running CPU's local APIC timer, with the boot CPU's calibration, once it has been done.
Definition at line 529 of file apic.c.
References LAPIC_LVT_TIMER, LAPIC_TIMER_DIV, LAPIC_TIMER_INIT, lapic_write(), LVT_PERIODIC, timer_count, TIMER_DIV_16, x86_lapic_timer_cpu_start(), and X86_TIMER_VECTOR.
Referenced by __x86_irq_handler(), x86_lapic_timer_cpu_start(), and x86_lapic_timer_setup().
| uint32_t x86_lapic_timer_setup | ( | uint32_t | period_ns, |
| irq_handler_t | handler ) |
Starts the scheduler's tick with the local APIC's timer, calibrated first.
| period_ns | the tick's period, in ns |
| handler | the tick's handler |
Definition at line 512 of file apic.c.
References irq_install(), NULL, printk(), timer_calibrate(), timer_count, X86_IRQ_TIMER, x86_lapic_timer_cpu_start(), and x86_lapic_timer_setup().
Referenced by platform_timer_setup(), and x86_lapic_timer_setup().
| void x86_pic_disable | ( | void | ) |
Masks every IRQ of the 8259s, when the APIC brings the interrupts.
Definition at line 152 of file pic.c.
References io_out8(), master, PIC_DATA, slave, and x86_pic_disable().
Referenced by x86_apic_setup(), x86_pic_disable(), and x86_pic_setup().
Sets up the 8259s, with every IRQ masked.
| _master | the master's ports (0x20) |
| _slave | the slave's ports (0xA0) |
Definition at line 165 of file pic.c.
References ioaddr::addr, ioaddr_type_str(), master, printk(), slave, x86_irq_remap(), x86_pic_disable(), x86_pic_probe(), and x86_pic_setup().
Referenced by x86_pc_pic_init(), and x86_pic_setup().
| void x86_pit_delay | ( | uint32_t | us | ) |
Waits us microseconds, at most 54 ms, busy.
Channel 2 counts down once, and its output goes high at 0; channel 0 keeps the tick.
| us | how long to wait, in microseconds |
Definition at line 123 of file pit.c.
References FBASE, GATE2, io_in8(), io_out8(), IOADDR_PORT, OUT2, PIT_ACCESS_LOHIBYTE, PIT_CHANNEL2, PIT_CMD, PIT_GATE_PORT, pit_ioaddr, printk(), SPEAKER, and x86_pit_delay().
Referenced by ap_boot(), timer_calibrate(), tsc_calibrate(), and x86_pit_delay().
Makes channel 0 interrupt periodically, for the scheduler's tick.
The i8254.div kernel argument sets the divisor directly.
| period_ns | the period wanted, in ns |
Definition at line 82 of file pit.c.
References atou32(), FBASE, io_out8(), kargs_get(), NULL, PIT_ACCESS_LOHIBYTE, PIT_CHANNEL0, PIT_CMD, pit_ioaddr, PIT_MODE_SQUARE_WAVE, printk(), and x86_pit_period_set().
Referenced by platform_timer_setup(), and x86_pit_period_set().
| int x86_pit_setup | ( | struct ioaddr * | io | ) |
Sets where the PIT's ports are.
| io | its ports (0x40) |
Definition at line 52 of file pit.c.
References ioaddr::addr, ioaddr_type_str(), pit_ioaddr, printk(), and x86_pit_setup().
Referenced by x86_pc_pit_init(), and x86_pit_setup().
| void x86_smp_init | ( | void | ) |
Starts the other CPUs, at boot, unless the kernel's command line says smp=off.
A CPU that doesn't answer is left out.
Definition at line 182 of file smp.c.
References ap_boot(), arch_cpu::apic_id, cpu::arch, cpus, cpus_count, CPUS_MAX, trampoline_data::cr0, trampoline_data::cr3, trampoline_data::cr4, trampoline_data::efer, cpu::id, arch_cpu::idle_stack, IDLE_STACK_SIZE, kargs_get(), kfree(), kmalloc(), memcpy(), memset(), MSR_EFER, NULL, PAGE_SIZE, PHYS2VIRT, printk(), read_cr4(), tables_build(), x86_apic_cpus(), x86_smp_init(), X86_TRAMPOLINE, x86_trampoline, x86_trampoline_data, and x86_trampoline_end.
Referenced by platform_init(), and x86_smp_init().
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extern |
Definition at line 126 of file pic.c.
Referenced by x86_pc_irq_init().