x86: devices' interrupts (IRQs), whichever controller brings them: the 8259s or the APIC, each an x86_irq_chip. More...

#include <core/system.h>
#include <core/arch.h>
#include <core/panic.h>
#include <core/string.h>
#include <cpu/cpu.h>
#include <dev/irq.h>
#include <platform/misc.h>
#include <sys/sched.h>
#include <sys/signal.h>
#include <sys/lock.h>
#include <mm/pmap.h>

Data Structures
struct	handler
	An installed handler, on its interrupt's list. More...
struct	[struct].irqs

Functions
static struct x86_irq_chip *	chip_of (unsigned irq)
	Returns the controller of an IRQ: its own, or the system's.
void	x86_irq_chip_set (struct x86_irq_chip *c)
	Sets the system's interrupt controller.
const char *	x86_irq_chip_name (void)
	Returns the name of the system's interrupt controller.
void	x86_irq_alloc_from (unsigned first)
	Sets the first IRQ that x86_irq_alloc() may give: past the I/O APICs' last pin.
int	x86_irq_alloc (struct x86_irq_chip *c)
	Gives a free IRQ with a controller of its own, for an MSI.
int	irq_install (unsigned irq, irq_handler_t fn, void *arg)
	Installs a handler for an IRQ.
void	irq_uninstall (unsigned irq, irq_handler_t fn, void *arg)
	Removes a handler that irq_install() installed.
void	x86_irq_tick_switch (void)
	Asks for a thread switch once the current interrupt is done: the tick calls it.
static void	irq_handle (struct x86_regs *r)
	Runs an interrupt's handlers, then tells its controller that it is done.
static void	irq_dispatch (struct x86_regs *r)
	Handles an interrupt, then switches threads if the tick asked for it or an urgent thread was woken, and returns to what was interrupted.
void	__x86_irq_handler (struct x86_regs *r)
	Handles an interrupt: a device's, the tick, or an IPI.
void	x86_irq_gates_setup (void)
	Sets the IDT's gates for the interrupts: vectors 32 to 79, the local APIC's timer, the TLB and wake IPIs, and its spurious interrupt.
int	arch_interrupts_info (char *buf, size_t size)
	Writes /proc/interrupts: the controller, then how many times each IRQ with handlers came, and how many TLB flushes each CPU did for another.

Variables
static struct	irqs [X86_IRQ_NR]
static struct x86_irq_chip *	chip
static unsigned	alloc_first = X86_IRQ_TIMER

Detailed Description

x86: devices' interrupts (IRQs), whichever controller brings them: the 8259s or the APIC, each an x86_irq_chip.

IRQ n is vector 32 + n. With the 8259s, the IRQs are the ISA bus's 16. With the APIC, they are what the I/O APICs route from their pins: the ISA IRQs too (on the pins the MADT says), and PCI devices' lines (from their configuration space). The local APIC's timer, vector 240, is an IRQ of its own here (X86_IRQ_TIMER).

An IRQ may have several handlers, because a PCI line can be shared: each is called, and each looks at its own device. An IRQ may also have a controller of its own: an MSI's is the device itself (x86_irq_alloc() gives those IRQs, above the I/O APICs' pins).

After the handlers, the controller is told that the interrupt is done (the EOI; a level-triggered line would raise it again before). Only then may what the interrupt woke up run (an urgent thread, or the thread switch the tick asked for).

Definition in file irq.c.

Function Documentation

◆ __x86_irq_handler()

void __x86_irq_handler ( struct x86_regs * r )

Handles an interrupt: a device's, the tick, or an IPI.

The stubs in cpu.S call it. It takes the kernel lock if it came from user mode or the idle loop (in the kernel, the lock is held already), and lets go of it on the way back. The TLB IPI is handled without the lock, because the CPU that sent it holds it, waiting.

Parameters