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AquilaOS documentation
How it works, and its code
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An IDE channel, with the master and slave drives on it. More...
#include <ata.h>
Data Fields | |
| struct ioaddr | base |
| the command block's registers, and the bus master's for DMA (whose address is 0 if the controller has none) | |
| struct ioaddr | bm |
| int | irq |
| int | busy |
| one command at a time: whether one is running, and the requests waiting for the channel | |
| struct waitq | wait |
| struct waitq | irq_wait |
| the DMA transfer waiting for the interrupt, and what it found | |
| volatile int | done |
| uint8_t | bm_status |
| uint8_t | status |
| struct ioaddr ata_channel::base |
the command block's registers, and the bus master's for DMA (whose address is 0 if the controller has none)
Definition at line 110 of file ata.h.
Referenced by ata_probe(), dma_complete(), and dma_irq().
| struct ioaddr ata_channel::bm |
Definition at line 111 of file ata.h.
Referenced by ata_probe(), dma_complete(), dma_init(), dma_irq(), and dma_transfer().
| uint8_t ata_channel::bm_status |
Definition at line 122 of file ata.h.
Referenced by dma_complete(), and dma_transfer().
| int ata_channel::busy |
one command at a time: whether one is running, and the requests waiting for the channel
Definition at line 116 of file ata.h.
Referenced by channel_acquire(), and channel_release().
| volatile int ata_channel::done |
Definition at line 121 of file ata.h.
Referenced by dma_complete(), and dma_transfer().
| int ata_channel::irq |
Definition at line 112 of file ata.h.
Referenced by ata_probe().
| struct waitq ata_channel::irq_wait |
the DMA transfer waiting for the interrupt, and what it found
Definition at line 120 of file ata.h.
Referenced by dma_irq(), and dma_transfer().
| uint8_t ata_channel::status |
Definition at line 122 of file ata.h.
Referenced by dma_complete(), and dma_transfer().
| struct waitq ata_channel::wait |
Definition at line 117 of file ata.h.
Referenced by channel_acquire(), and channel_release().