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AquilaOS documentation
How it works, and its code
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The driver for ARM's PrimeCell UART (PL011), the serial port of QEMU's virt machine: /dev/ttyS0, and /dev/console when there are no virtual terminals. More...
#include <core/system.h>#include <core/module.h>#include <cpu/io.h>#include <dev/tty.h>#include <dev/uart.h>#include <dev/irq.h>#include <dev/platform.h>Go to the source code of this file.
Macros | |
| #define | UART_DR 0x00 |
| #define | UART_FR 0x18 |
| #define | UART_LCR_H 0x2C |
| #define | UART_IMSC 0x38 |
| #define | UART_ICR 0x44 |
| #define | FR_RXFE (1 << 4) |
| #define | FR_TXFF (1 << 5) |
| #define | INT_RX (1 << 4) |
| #define | INT_RT (1 << 6) |
| #define | LCR_H_FEN (1 << 4) |
| #define | LCR_H_WLEN8 (3 << 5) |
Functions | |
| static ssize_t | pl011_transmit (struct uart *u, char c) |
| Sends one character, once the transmit FIFO has room. | |
| static char | pl011_receive (struct uart *u) |
| Takes one received character from the receive FIFO. | |
| static void | pl011_irq (void *arg) |
| Handles the UART's interrupt: every received character goes to the terminal, or is dropped if no one has opened it. | |
| static void | pl011_comm_init (struct uart *u) |
| Sets the UART up when it is first opened: 8-bit characters, the FIFOs, and the receive interrupts. | |
| static int | pl011_init (void) |
| Finds the platform's PL011, installs its interrupt handler, and registers it as the first UART. | |
Variables | |
| static struct ioaddr | io |
| struct uart | uart_pl011 |
The driver for ARM's PrimeCell UART (PL011), the serial port of QEMU's virt machine: /dev/ttyS0, and /dev/console when there are no virtual terminals.
Output is written one character at a time, waiting while the transmit FIFO is full. Input comes with the UART's interrupt, which drains the receive FIFO into the terminal. The UART's address and interrupt are the platform's (dev/platform.h); the driver drives one UART, the first the platform has.
References: [1] - ARM PrimeCell UART (PL011) Technical Reference Manual (DDI 0183): UARTDR, UARTFR, UARTIMSC, UARTICR
Definition in file pl011.c.
| #define FR_RXFE (1 << 4) |
Definition at line 31 of file pl011.c.
Referenced by pl011_irq().
| #define FR_TXFF (1 << 5) |
Definition at line 32 of file pl011.c.
Referenced by pl011_transmit().
| #define INT_RT (1 << 6) |
Definition at line 34 of file pl011.c.
Referenced by pl011_comm_init(), and pl011_irq().
| #define INT_RX (1 << 4) |
Definition at line 33 of file pl011.c.
Referenced by pl011_comm_init(), and pl011_irq().
| #define LCR_H_FEN (1 << 4) |
Definition at line 35 of file pl011.c.
Referenced by pl011_comm_init().
| #define LCR_H_WLEN8 (3 << 5) |
Definition at line 36 of file pl011.c.
Referenced by pl011_comm_init().
| #define UART_ICR 0x44 |
Definition at line 29 of file pl011.c.
Referenced by pl011_irq().
| #define UART_IMSC 0x38 |
Definition at line 28 of file pl011.c.
Referenced by pl011_comm_init().
| #define UART_LCR_H 0x2C |
Definition at line 27 of file pl011.c.
Referenced by pl011_comm_init().
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Sets the UART up when it is first opened: 8-bit characters, the FIFOs, and the receive interrupts.
QEMU's UART needs no speed set.
Definition at line 80 of file pl011.c.
References INT_RT, INT_RX, io, io_out32(), LCR_H_FEN, LCR_H_WLEN8, pl011_comm_init(), UART_IMSC, and UART_LCR_H.
Referenced by pl011_comm_init().
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Finds the platform's PL011, installs its interrupt handler, and registers it as the first UART.
Definition at line 88 of file pl011.c.
References io, platform_device::irq, irq_install(), platform_device::nirq, NULL, pl011_init(), pl011_irq(), platform_device_get(), platform_device_io(), uart_pl011, and uart_register().
Referenced by pl011_init().
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Handles the UART's interrupt: every received character goes to the terminal, or is dropped if no one has opened it.
Definition at line 62 of file pl011.c.
References FR_RXFE, INT_RT, INT_RX, io, io_in32(), io_out32(), pl011_irq(), pl011_receive(), uart::tty, UART_FR, UART_ICR, uart_pl011, and uart_receive_handler().
Referenced by pl011_init(), and pl011_irq().
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Takes one received character from the receive FIFO.
Definition at line 55 of file pl011.c.
References io, io_in32(), pl011_receive(), and UART_DR.
Referenced by pl011_irq(), and pl011_receive().
Sends one character, once the transmit FIFO has room.
Definition at line 43 of file pl011.c.
References FR_TXFF, io, io_in32(), io_out32(), pl011_transmit(), UART_DR, and UART_FR.
Referenced by pl011_transmit().
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static |
Definition at line 38 of file pl011.c.
Referenced by pl011_comm_init(), pl011_init(), pl011_irq(), pl011_receive(), and pl011_transmit().
| struct uart uart_pl011 |
Definition at line 40 of file pl011.c.
Referenced by pl011_init(), and pl011_irq().