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AquilaOS documentation
How it works, and its code
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#include <core/system.h>Go to the source code of this file.
Data Structures | |
| struct | x86_regs |
| The registers an interrupt or exception saved, on the kernel stack, as cpu.S's stubs push them: the general registers, the stub's vector and error code, then what the CPU pushed. More... | |
| struct | x86_gdt_entry |
| A segment descriptor, an entry of the GDT. More... | |
| struct | x86_tss |
| struct | arch_cpu |
| A CPU's aarch64 state (struct cpu's arch). More... | |
Macros | |
| #define | X86_GDT_TSS 5 |
| #define | X86_GDT_CPU 7 |
| #define | X86_GDT_NR 8 |
| #define | X86_SEL_CPU (X86_GDT_CPU << 3) |
| #define | CR0_PG _BV(31) |
| #define | CR0_WP _BV(16) |
| #define | CR0_MP _BV(1) |
| #define | CR0_EM _BV(2) |
| #define | CR0_TS _BV(3) |
| #define | CR0_NE _BV(5) |
| #define | CR4_PSE _BV(4) |
| #define | CR4_OSFXSR _BV(9) |
| #define | CR4_OSXMMEXCPT _BV(10) |
Functions | |
| static void | x86_dump_registers (struct x86_regs *regs) |
| static struct cpu * | curcpu (void) |
| static uintptr_t | read_cr0 (void) |
| static uintptr_t | read_cr1 (void) |
| static uintptr_t | read_cr2 (void) |
| static uintptr_t | read_cr3 (void) |
| static uintptr_t | read_cr4 (void) |
| static void | write_cr0 (uintptr_t val) |
| static void | write_cr1 (uintptr_t val) |
| static void | write_cr2 (uintptr_t val) |
| static void | write_cr3 (uintptr_t val) |
| static void | write_cr4 (uintptr_t val) |
| void | x86_gdt_setup (struct cpu *cpu, uintptr_t sp) |
| Sets up and loads the running CPU's GDT and TSS, and points gs (or the GS base, on x86_64) at its struct cpu, so that curcpu() works. | |
| void | x86_kernel_stack_set (uintptr_t sp) |
| Sets the kernel stack that interrupts from user mode switch to, on the running CPU: the thread that is about to run's. | |
| void | x86_idt_setup (void) |
| Loads the IDT on the running CPU. | |
| void | x86_idt_gate_set (uint32_t id, uintptr_t offset) |
| Sets an interrupt gate that only the hardware (and the kernel) can raise: an exception or a device interrupt. | |
| void | x86_idt_gate_user_set (uint32_t id, uintptr_t offset) |
| Sets an interrupt gate that user mode may raise with int too: the system call vector. | |
| void | x86_isr_setup (void) |
| Sets the IDT's gates for the exceptions and the system call vector. | |
| void | x86_fpu_setup (void) |
| Sets up the FPU on the running CPU, at boot: CR0.TS set so that the first FPU or SSE instruction raises #NM (x86_fpu_trap()), SSE turned on if the CPU has it, and the clean starting state recorded. | |
| void | x86_fpu_enable (void) |
| Lets the running CPU use the FPU without trapping (clears CR0.TS). | |
| void | x86_fpu_disable (void) |
| Makes the next FPU instruction trap (sets CR0.TS). | |
| void | x86_fpu_trap (void) |
| Handles #NM, the current thread's first FPU or SSE instruction since it was switched in: it saves the previous owner's state, and gives the FPU to this thread, with its own state or a clean one. | |
| void | x86_fpu_switch_out (void) |
| Saves the current thread's FPU state when it is switched out, if the FPU holds it, because the thread may run on another CPU next. | |
| int | x86_fpu_save_to (void *buf) |
| Copies the current thread's FPU state, for a signal handler's frame (sys/signal.c). | |
| void | x86_fpu_reset (void) |
| Makes the current thread start with a clean FPU state at its next use of the FPU, as a signal handler does. | |
| void | x86_fpu_load_from (const void *buf, int valid) |
| Gives the current thread back the FPU state saved in a signal frame, at sigreturn. | |
| void | x86_return_to_user (struct x86_regs *r, int syscall) |
| Delivers the current process's pending signals on the way back to user mode: stops and default actions, a handler, and the restart (or EINTR) of a system call that a signal interrupted. | |
| #define CR0_EM _BV(2) |
Definition at line 158 of file cpu.h.
Referenced by x86_fpu_setup().
| #define CR0_MP _BV(1) |
Definition at line 157 of file cpu.h.
Referenced by x86_fpu_setup().
| #define CR0_NE _BV(5) |
Definition at line 160 of file cpu.h.
Referenced by x86_fpu_setup().
| #define CR0_PG _BV(31) |
Definition at line 155 of file cpu.h.
Referenced by enable_paging().
| #define CR0_TS _BV(3) |
Definition at line 159 of file cpu.h.
Referenced by x86_fpu_disable(), and x86_fpu_setup().
| #define CR0_WP _BV(16) |
Definition at line 156 of file cpu.h.
Referenced by enable_paging().
| #define CR4_OSFXSR _BV(9) |
Definition at line 164 of file cpu.h.
Referenced by x86_fpu_setup().
| #define CR4_OSXMMEXCPT _BV(10) |
Definition at line 165 of file cpu.h.
Referenced by x86_fpu_setup().
| #define X86_GDT_CPU 7 |
Definition at line 115 of file cpu.h.
Referenced by x86_gdt_setup().
| #define X86_GDT_TSS 5 |
Definition at line 114 of file cpu.h.
Referenced by x86_gdt_setup().
| #define X86_SEL_CPU (X86_GDT_CPU << 3) |
Definition at line 118 of file cpu.h.
Referenced by x86_gdt_setup().
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Definition at line 190 of file cpu.h.
References read_cr2().
Referenced by isr_dispatch(), and read_cr2().
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Definition at line 201 of file cpu.h.
References read_cr3().
Referenced by pmap_init(), read_cr3(), and tlb_flush().
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Definition at line 212 of file cpu.h.
References read_cr4().
Referenced by read_cr4(), x86_fpu_setup(), and x86_smp_init().
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Definition at line 259 of file cpu.h.
References write_cr4().
Referenced by write_cr4(), and x86_fpu_setup().
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Definition at line 29 of file cpu.h.
References x86_regs::cs, printk(), x86_regs::r10, x86_regs::r11, x86_regs::r12, x86_regs::r13, x86_regs::r14, x86_regs::r15, x86_regs::r8, x86_regs::r9, x86_regs::rax, x86_regs::rbp, x86_regs::rbx, x86_regs::rcx, x86_regs::rdi, x86_regs::rdx, x86_regs::rflags, x86_regs::rip, x86_regs::rsi, x86_regs::rsp, x86_regs::ss, and x86_dump_registers().
Referenced by isr_dispatch(), and x86_dump_registers().
| void x86_fpu_disable | ( | void | ) |
Makes the next FPU instruction trap (sets CR0.TS).
Definition at line 88 of file fpu.c.
References CR0_TS, and x86_fpu_disable().
Referenced by arch_thread_spawn(), arch_thread_switch(), x86_fpu_disable(), x86_fpu_reset(), and x86_fpu_setup().
| void x86_fpu_enable | ( | void | ) |
Lets the running CPU use the FPU without trapping (clears CR0.TS).
Definition at line 82 of file fpu.c.
References x86_fpu_enable().
Referenced by x86_fpu_enable(), x86_fpu_save_to(), x86_fpu_setup(), x86_fpu_switch_out(), and x86_fpu_trap().
| void x86_fpu_load_from | ( | const void * | buf, |
| int | valid ) |
Gives the current thread back the FPU state saved in a signal frame, at sigreturn.
It is loaded at the thread's next use of the FPU, with the MXCSR bits the CPU doesn't accept cleared.
| buf | the saved state: 512 bytes |
| valid | whether the frame has a state (the thread had used the FPU); if not, the thread starts afresh |
Definition at line 239 of file fpu.c.
References curthread, x86_thread::fpu_context, x86_thread::fpu_enabled, fpu_fxsr, kmalloc(), memcpy(), mxcsr_mask, x86_fpu_load_from(), and x86_fpu_reset().
Referenced by arch_sigreturn(), and x86_fpu_load_from().
| void x86_fpu_reset | ( | void | ) |
Makes the current thread start with a clean FPU state at its next use of the FPU, as a signal handler does.
Definition at line 218 of file fpu.c.
References curthread, x86_thread::fpu_enabled, last_fpu_thread, NULL, x86_fpu_disable(), and x86_fpu_reset().
Referenced by deliver(), x86_fpu_load_from(), and x86_fpu_reset().
| int x86_fpu_save_to | ( | void * | buf | ) |
Copies the current thread's FPU state, for a signal handler's frame (sys/signal.c).
| buf | where to copy it: 512 bytes, 16-byte aligned |
Definition at line 198 of file fpu.c.
References curthread, fpu_context, x86_thread::fpu_context, x86_thread::fpu_enabled, fpu_save(), last_fpu_thread, memcpy(), x86_fpu_enable(), and x86_fpu_save_to().
Referenced by arch_proc_fork(), deliver(), and x86_fpu_save_to().
| void x86_fpu_setup | ( | void | ) |
Sets up the FPU on the running CPU, at boot: CR0.TS set so that the first FPU or SSE instruction raises #NM (x86_fpu_trap()), SSE turned on if the CPU has it, and the clean starting state recorded.
CR0.EM must stay clear, or SSE instructions would raise #UD instead.
Definition at line 50 of file fpu.c.
References CPUID_EDX_FXSR, CPUID_EDX_SSE, CR0_EM, CR0_MP, CR0_NE, CR0_TS, CR4_OSFXSR, CR4_OSXMMEXCPT, fpu_clean, fpu_fxsr, memset(), mxcsr_mask, read_cr4(), write_cr4(), x86_fpu_disable(), x86_fpu_enable(), and x86_fpu_setup().
Referenced by x86_cpu_init(), and x86_fpu_setup().
| void x86_fpu_switch_out | ( | void | ) |
Saves the current thread's FPU state when it is switched out, if the FPU holds it, because the thread may run on another CPU next.
Afterwards, the FPU belongs to no thread.
Definition at line 178 of file fpu.c.
References curthread, fpu_context, x86_thread::fpu_context, fpu_save(), last_fpu_thread, memcpy(), NULL, x86_fpu_enable(), and x86_fpu_switch_out().
Referenced by x86_fpu_switch_out(), and x86_thread_saved().
| void x86_fpu_trap | ( | void | ) |
Handles #NM, the current thread's first FPU or SSE instruction since it was switched in: it saves the previous owner's state, and gives the FPU to this thread, with its own state or a clean one.
If there's no memory for the thread's save area, the process is killed.
Definition at line 131 of file fpu.c.
References curproc, curthread, fpu_context, x86_thread::fpu_context, x86_thread::fpu_enabled, fpu_restore(), fpu_save(), kmalloc(), last_fpu_thread, memcpy(), panic, signal_proc_send(), x86_fpu_enable(), x86_fpu_init(), and x86_fpu_trap().
Referenced by isr_dispatch(), and x86_fpu_trap().
Sets up and loads the running CPU's GDT and TSS, and points gs (or the GS base, on x86_64) at its struct cpu, so that curcpu() works.
| cpu | the running CPU |
| sp | the kernel stack that interrupts from user mode switch to (each thread sets its own later, x86_kernel_stack_set()) |
Definition at line 79 of file gdt.c.
References x86_tss::_, x86_tss::__, cpu::arch, assert_alignof, assert_sizeof, x86_gdt_entry::db, x86_gdt_entry::dpl, DPL0, DPL3, arch_cpu::gdt, gdt_template, memcpy(), memset(), MSR_GS_BASE, MSR_KERNEL_GS_BASE, x86_gdt_entry::p, RW_DATA, x86_gdt_entry::s, segment_set(), cpu::self, x86_tss::sp, arch_cpu::tss, TSS_AVL, x86_gdt_entry::type, X86_GDT_CPU, x86_gdt_setup(), X86_GDT_TSS, x86_lgdt(), x86_ltr(), and X86_SEL_CPU.
Referenced by x86_ap_start(), x86_cpu_init(), and x86_gdt_setup().
Sets an interrupt gate that only the hardware (and the kernel) can raise: an exception or a device interrupt.
The handler runs in the kernel's code segment, with interrupts disabled.
| id | the vector |
| offset | the handler's address |
Definition at line 45 of file idt.c.
References idt_entry::dpl, DPL0, idt_entry::flags, idt, idt_entry::offset_ext, idt_entry::offset_hi, idt_entry::offset_lo, idt_entry::p, idt_entry::selector, and x86_idt_gate_set().
Referenced by x86_idt_gate_set(), x86_irq_gates_setup(), and x86_isr_setup().
Sets an interrupt gate that user mode may raise with int too: the system call vector.
The handler still runs in the kernel's code segment.
| id | the vector |
| offset | the handler's address |
Definition at line 67 of file idt.c.
References idt_entry::dpl, DPL3, idt_entry::flags, idt, idt_entry::offset_ext, idt_entry::offset_hi, idt_entry::offset_lo, idt_entry::p, idt_entry::selector, and x86_idt_gate_user_set().
Referenced by x86_idt_gate_user_set(), and x86_isr_setup().
| void x86_idt_setup | ( | void | ) |
Loads the IDT on the running CPU.
Definition at line 82 of file idt.c.
References idt_ptr::base, idt, idt_pointer, idt_ptr::limit, x86_idt_setup(), and x86_lidt().
Referenced by x86_ap_start(), x86_cpu_init(), and x86_idt_setup().
| void x86_isr_setup | ( | void | ) |
Sets the IDT's gates for the exceptions and the system call vector.
Definition at line 253 of file isr.c.
References __x86_isr0(), __x86_isr1(), __x86_isr10(), __x86_isr11(), __x86_isr12(), __x86_isr128(), __x86_isr13(), __x86_isr14(), __x86_isr15(), __x86_isr16(), __x86_isr17(), __x86_isr18(), __x86_isr19(), __x86_isr2(), __x86_isr20(), __x86_isr21(), __x86_isr22(), __x86_isr23(), __x86_isr24(), __x86_isr25(), __x86_isr26(), __x86_isr27(), __x86_isr28(), __x86_isr29(), __x86_isr3(), __x86_isr30(), __x86_isr31(), __x86_isr4(), __x86_isr5(), __x86_isr6(), __x86_isr7(), __x86_isr8(), __x86_isr9(), x86_idt_gate_set(), x86_idt_gate_user_set(), and x86_isr_setup().
Referenced by x86_cpu_init(), and x86_isr_setup().
| void x86_kernel_stack_set | ( | uintptr_t | sp | ) |
Sets the kernel stack that interrupts from user mode switch to, on the running CPU: the thread that is about to run's.
| sp | the top of the stack |
Definition at line 152 of file gdt.c.
References x86_kernel_stack_set().
Referenced by arch_idle(), arch_thread_kill(), arch_thread_spawn(), arch_thread_switch(), and x86_kernel_stack_set().
| void x86_return_to_user | ( | struct x86_regs * | r, |
| int | syscall ) |
Delivers the current process's pending signals on the way back to user mode: stops and default actions, a handler, and the restart (or EINTR) of a system call that a signal interrupted.
| r | the user context about to be returned to |
| syscall | whether r is returning from a system call (one that may need restarting) |
Definition at line 246 of file signal.c.
References thread::arch, x86_regs::cs, curthread, deliver(), ERESTARTNOHAND, ERESTARTSYS, thread::owner, REG_AX, REG_IP, thread::restarting, thread::sig_oldmask, thread::sig_oldmask_set, proc::sigaction, proc::sigmask, signal_take(), thread::syscall_nr, and x86_return_to_user().
Referenced by arch_syscall(), irq_dispatch(), isr_dispatch(), and x86_return_to_user().